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    Carbon Nanotube DRAM – Is carbon nanotube memory too good to be true?


    An IP design house has developed a scalable DRAM replacement using carbon nanotubes (CNTs) that abolishes the DRAM refresh rate, stores the content permanently, has better timing than DRAM and is scalable. And it lasts for somewhere between 300 and 12,000 years.

    “Carbon nanotube memory—it sounds so sexy that I could just shut up and not say anything,” said Bill Gervasi, principal systems architect at Nantero, as his opening remarks for his presentation on CNT NRAM at HotChips 2018, in Cupertino, Calif.

    Indeed, CNTs have desirable properties for electronics. They are incredibly strong and yet elastic, lightweight, and conduct heat and electricity better than metal. But they are still semiconductors, even though using them remains exotic and elusive.

    The device Nantero highlighted at HotChips was a DDR4 drop-in replacement device that company designed for a customer. Based on cells of CNTs, the silicon (or other material) is layered directly on top of the CNT layer. Eventually, Nantero sees more layers can be added.

    Nantero, a private company that licenses IP with more than 170 nanotube patents, has a direct replacement for DRAM using carbon nanotube memory, which the company says is NRAM (non-volatile random access memory). The company, founded in 2001 and now in Series G funding according to Crunchbase, wants you to think of this as memory class storage, a new term. It offers its NRAM as both embedded and DRAM. Fujitsu Semiconductor is one of its customers.

    The industry has either taken DRAM for granted all these years, and in the process put up with a lot from the technology. “The big win is the refresh goes way,” said Gervasi. “We get 15% more data at the same clock frequency as a DRAM.” Gervasi reminded the audience that persistent memory is the memory industry’s holy grail right now: system designers want to get away from the issues of losing data on power loss. Usually with DRAM, the data has to go a flash memory every so often when data is switching between DRAM and flash, a lag time makes the memory unavailable.

    Fig. 1: Nantero’s DDR4 replacement using carbon nanotubes. A SECDED ECC engine is a safety net as a backdoor to increase yield. The arrays are broken into 4-bits-high, 64-bits-long tiles with decode logic, which sends data through the latching sense amp. No pre-charge commands are needed. Source: Nantero

    Right now, on 28nm technology, Nantero says its NRAM is getting 4Gbits per layer on a square mm die. “The set and reset is a balanced 5 nanoseconds per bit cell” after trying it out on several processes, from 105nm to 15nm, said Gervasi.

    Fig. 2: How Nantero’s CNT NRAM module compares on power fail with industry standard persistent memory, NVDIMM-N or -P. Source: Nantero

    “This entire concept of having unlimited write endurance and the fast timing parameters of a 5nsec core allows us to define a new concept of a memory class storage as a device that operates as a memory but stores the content permanently,” said Gervasi. “The scalability is way beyond what a DRAM looks like, so I think we have a very comfortable roadmap to replace DRAM for the long term. The timing is better than a DRAM…with the additional throughput, and the on-the-fly ECC is going to be a nice safety net to be sure we get a reliable data connection.”

    Hundreds of CNTs are in cells in the memory. Once the single level cells are out in the industry, Nantero will start looking into multilayer cells. The flexibility is the nanotube layers can be layered with anything, so they are scalable and process agnostic.

    “What you are talking about is almost too good to be true,” said Nathan Brookwood, research analyst at Insight 64, during the Q&A.

    Add layers and stir
    The memory is resistive non-volatile random access memory (NVRAM), where an electrostatic charge is setting and resetting each bit as “0” or “1.”

    “It takes the electrostatic force to make a couple of carbon nanotubes connect. And once they connect, they stay connected until an electrostatic force of the opposite charge breaks them apart, and that is basics of a switch.” Nantero has between hundreds and thousands of such nanotubes in every cell “forming a stochastic network of resistive elements.” The cells’ resistance changes based on the electrostatic force applied. Gervasi showed an animation of a pile of carbon nanotubes seemingly breathing, moving up and down.

    Fig. 3: The basics of a resistive CNTs. Source: Nantero.

    Nantero has a process for selecting the right-sized nanotube. They need tubes in a Goldilocks range: not too long, not too short, and the diameter has to be just right to make them pivot “like a diving board.” They coat a slurry of carbon nanotubes on top of base layers of logic. “The manufacturing process is almost embarrassingly simple,” said Gervasi. The logic is built on any process or geometry as the base layer, “you expose metal contacts and you literally spin coat the carbon nanotube slurry over the top of the structure,” said Gervasi. Bake, etch and seal.

    A protective layer of stationary (non-moving) nanotubes protects the lower layers of switching nanotubes from the metal that poured on top of CNT layer.

    Iterative layers can scale it up. “You can scale by adding more layers,” sais Gervasi. “With four layers of carbon nanotubes, we have a 16Gbit device.”

    Nantero believes at 5nm, even 1nm, the NRAM will work by changing the size of the tubes.