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    Self-assembling polymer could help cram more circuits onto microchips

    An MIT team has developed a new way to cram more circuits onto microchips, using manufacturing ...
    An MIT team has developed a new way to cram more circuits onto microchips, using manufacturing techniques already in wide use (Credit: spopov/Depositphotos)


    Researchers at MIT have developed a new way to make smaller circuits, which could help break down barriers standing in the way of the continuation of Moore’s Law and ever-more powerful microchips. Using a self-assembling polymer layer, the new technique could make patterns smaller than 10 nm by combining several processes already widely used to make chips, which means they could be implemented at a large scale relatively easily and cheaply.

    Microchips begin with a thin slice of silicon called a wafer. The process of turning that into a microchip varies, but broadly, materials are deposited onto the surface, patterns of lines are drawn in via a process called lithography, and the electrical properties of different parts of the circuits are modified by exposure to UV light. The smaller each pattern of lines can be made, the more of them can be crammed onto each chip, making for faster and more powerful devices.

    “People always want smaller and smaller patterns, but achieving that has been getting more and more expensive,” says Karen Gleason, co-author of the study.

    The basic steps of the MIT team’s new method are all in wide use already, but here they’re mixed and matched in a new way, and further spiced up with a special material called a block copolymer. First, a pattern is etched onto the chip surface with an electron beam, then to add the copolymer layer, precursor materials are vaporized and allowed to condense onto the cool surface of the chip. The atoms of these materials bond together to form chain-shaped molecules, made up of the two different polymers.

    This new copolymer layer then self-assembles into a very specific pattern, guided by the lithographic lines on the layer underneath and a third protective polymer layer deposited on top. The copolymer will naturally form its own lines, following the pattern below but with one major difference: for each of the base lines, there are now four copolymer lines. Essentially, that’s shrinking the pattern down to a quarter of its previous size, and the top layer can then be patterned as well, allowing circuits to be stacked as needed.

    Using a scanning electron microscope, each step of the team’s method can be seen: at the top are the standard lines, created with an electron beam; in the middle, the number of lines is multiplied by four, thanks to the block copolymer layer and a top protective layer; and at the bottom, the lines are exposed when the top layer is etched away (Credit: MIT)

    While other techniques are capable of making lines this thin, the researchers say their method would be easier to implement on a large scale and more economically viable for mass production. That’s because lithography is already commonly used in microchip factories, and initiated chemical vapor deposition – the method used to add the top polymer layer – can be added to the workflow without too much fuss and wouldn’t require any new machinery.

    “Being able to create sub-10-nanometer features with polymers is major progress in the area of nanofabrication,” says Joerg Lahann, a University of Michigan professor, who wasn’t involved in the study. “The quality and robustness of this process will open an entirely new area of applications, from nanopatterning to nanotribology. This work is an ingenious extension of previous research by these researchers. The fact that they can demonstrate arbitrary structures highlights the quality and versatility of this novel technology.”

    The research was published in the journal Nature Nanotechnology.

    Source: MIT